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Vivado tool flow, Basics of verilog coding, Different FPGA architectures, FPGA programming/Prototyping
IModule 1: Introduction to Verilog language constructs, RTL coding, Functional Verification, Synthesis & STA, Gate level simulations Module2:SOC introduction, SOC design concepts, SOC Components. Module 3: FPGA Architecture: Internals of FPGA, Logic implementation, FPGA Architectures of various FPGA vendors, Logic elements and Look-up Tables, Dedicated multipliers, Distributed RAM Module 4: Introduction and usage of IP cores, Design constraining and pin locking Timing analysis, slack calculation, Area and Power Constraints, Static Timing Analysis Module 5: FPGA prototyping |
Venue Phase | Offline |
Venue Details | Atria Institute of Technology, VLSI Lab (ECE), Bengaluru(Department) |
Venue Address | Atria Institute of Technology, ASKB Campus, 1st Main Rd, Ags Colony, Anandnagar, Hebbal, Bengaluru-560024, bangalore, Karnataka,560024 |
Training Document | ![]() |
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